The present invention relates, in general, to electronics, and more particularly, to semiconductor switching circuits.
In the past, the electronics industry utilized various design techniques to build switching circuits and particularly to form high-power switching circuits. These high-power switching circuits often utilize a power transistor that is alternately switched on and off to provide power to an inductive load. One example of such high-power switching circuits is a switching power supply, often referred to as a switch mode power supply (SMPS). A switch mode power supply typically utilizes an integrated circuit to drive external power transistors that are connected to the inductive load. During an initial power on sequencing or after recovering from an error condition or overload mode, the integrated circuit generally delivers maximum power to the load in order to generate the desired power supply voltage. The voltage at the load often overshoots the desired value before the integrated circuit can effectively reduce the drive to the power transistors. During this transition time, the power transistors must sustain large current flows which can overheat and damage the power transistors. Typically other circuits are connected to a secondary side of the inductive load. These other circuits can also be damaged by the large currents. Often, resistors and capacitors are connected as a delay network to slow the rate at which the switching signals are applied to the power transistors thereby slowing the rate at which the load is charged to the desired voltage value.
One problem with these capacitors and resistors is the physical size and values of the resistors and capacitors used to provide the delay. Typically, the circuit delays over a time period of one to fifteen milliseconds. Providing such a long time delay typically requires capacitor values that range from one to one thousand nanofarads. Such large capacitor values typically are difficult to integrate onto a semiconductor die because such values consume a very large amount of semiconductor die area.
Accordingly, it is desirable to have a method of forming a switching device that does not utilize large value capacitors, and that can be integrated onto a semiconductor die.